Common Options : 5T, 6T, 7T, 8T

Details

Like SDRAM Tras Timing Value, this feature controls the memory bank's minimum row active time (tRAS). This constitutes the length of time from the activate command to the precharge command of the same bank. Hence, the name DRAM Act to PreChrg CMD which is short for DRAM Activate Command to Precharge Command.

Now, tRAS is important because it determines how soon after a row activation can the same row be precharged for another cycle. If it is set for a long time, well, the row will be unnecessarily delayed from precharging for another cycle. But if you set it for too short a period, there may not be enough time to complete the read/write cycle. When that happens, there will be loss or corruption of data.

For optimal performance, use the lowest value you can. But if you start getting memory errors or system crashes, increase the value. Note that because the bank cycle time (tRC) = minimum row active time (tRAS) + row precharge time (tRP), you should take into account the values for tRC and tRP before selecting the tRAS value.