Common Options : Enabled, Disabled

Details

This feature controls the CPU-to-PCI write buffer. If this buffer is disabled, the CPU will write directly to the PCI bus. Although it may seem like the faster and better method, that isn't really true.

Because the CPU bus (100MHz to 266MHz and beyond) is much faster than the PCI bus (33MHz), any CPU writes to the PCI bus will have to wait until the PCI bus is ready to receive data. This prevents the CPU from doing anything else until it has completed the transaction.

Enabling the buffer allows the CPU to immediately write up to 4 words of data to the buffer so that it can work on another task without waiting for those 4 words of data to reach the PCI bus.

Note that the data in the write buffer won't reach the PCI bus any faster than usual as they will only be written to the PCI bus when the next PCI read cycle starts. But the difference here is that it does so without stalling the CPU for the entire CPU to PCI transaction.

To sum it all up, enabling the CPU to PCI write buffer frees up CPU cycles that would normally be wasted waiting for the PCI bus. Therefore, it's recommended that you enable the CPU to PCI write buffer.