Options : Enabled, Disabled

This function protects the BIOS from accidental corruption by unauthorized users or computer viruses. When enabled, the BIOS' data cannot be changed when attempting to update the BIOS with a Flash utility. To successfully update the BIOS, you'll need to disable this Flash BIOS Protection function.

You should enable this function at all times. The only time when you need to disable it is when you want to update the BIOS. After updating the BIOS, you should immediately re-enable it to protect it against viruses.

Hardware Reset Protect

Options : Enabled, Disabled

This function is useful for file servers and routers, etc., which need to be running 24 hours a day. When enabled, the system's hardware reset button will not function. This prevents the possibility of any accidental resets. When set as Disabled, the reset button will function as normal.

It is recommended that you leave it as Disabled unless you are running a server and you have kids who just love to press that little red button running around. ;)

DRAM Read Latch Delay

Options : Enabled, Disabled

This is a BIOS function that introduces a small delay before the system reads data from a DRAM module. This feature was added to facilitate the use of some special SDRAM modules that have unusual timings. You need not enable this feature unless you experience strange system crashes that you suspect is due to memory instability.

So, it's recommended that you leave it as Disabled unless you are experiencing some system stability issues. In that case, you can enable this BIOS function to see if your DRAM module is one of those with unusual timings and to correct that problem.

DRAM Interleave Time

Options : 0ms, 0.5ms

This BIOS function controls the timing for reading the next bank of data when DRAM Interleave or SDRAM Bank Interleave is enabled. Naturally, the lower the time you use, the faster the DRAM modules can interleave and consequently, the better the performance.

So, it is recommended that you set the time as low as possible for better DRAM performance. Increase the DRAM interleave time only if you face system stability problems.

Byte Merge

Options : Enabled, Disabled

Byte merging holds 8-bit or 16-bit writes from the CPU to the PCI bus in a buffer where it is accumulated and merged into 32-bit writes. The chipset then writes the data in the buffer to the PCI bus when it can. As you can see, merging 8-bit or 16-bit writes reduces the number of PCI transactions, thus freeing up both bandwidth and CPU time.

So, it's recommended that you enable this feature for better CPU and PCI performance. But note that Byte Merge may be incompatible with certain PCI cards. Boar-Ral explains :-

I noticed that some PCI cards really despise Byte Merge, in particular the 3Com 3C905 series of NICs. While this may only apply to certain motherboards, in my case the P3V4X, I feel this is probably not the case and it is a rather widespread problem.

Issues I have encountered with Byte Merge enabled range from Windows 98SE freezing at the boot screen to my NIC not functioning at all. This issue has been confirmed with others using the same NIC and is what alerted me to the issue in the first place.

PCI Pipeline / PCI Pipelining

Options : Enabled, Disabled

This BIOS function combines PCI or CPU pipelining with byte merging. Byte merging is then used to enhance performance of the graphics card. This function controls the byte-merge feature for framebuffer cycles. When Enabled, the controller checks the eight CPU Byte Enable signals to determine if data bytes read from the PCI bus by the CPU can be merged.

So, it's recommended that you enable this feature for better performance with your PCI graphics card. Other PCI devices may benefit from this feature as well.

Fast R-W Turn Around

Options : Enabled, Disabled

This BIOS option reduces the delay that occurs when the CPU first reads from the RAM and then writes to it. There is normally an extra delay associated with this switch from reading to writing.

If you enable this option, the delay will be reduced and switching from read to write will be faster. However, if your RAM modules cannot handle the faster turnaround, data may be lost and your system may become unstable. With that in mind, enable this option for better RAM performance unless you face stability problems after enabling it.

CPU to PCI Write Buffer

Options : Enabled, Disabled

This controls the CPU write buffer to the PCI bus. If this buffer is disabled, the CPU writes directly to the PCI bus. Although this may seem like the faster and thus, the better method, this isn't true. Because the CPU bus is faster than the PCI bus, any CPU writes to the PCI bus has to wait until the PCI bus is ready to receive data. This prevents the CPU from doing anything else until it has completed sending the data to the PCI bus.

Enabling the buffer enables the CPU to immediately write up to 4 words of data to the buffer so that it can continue on another task without waiting for those 4 words of data to reach the PCI bus. The data in the write buffer will be written to the PCI bus when the next PCI bus read cycle starts. The difference here is that it does so without stalling the CPU for the entire CPU to PCI transaction.

Therefore, it's recommended that you enable the CPU to PCI write buffer.